In the manufacture of integrated circuits with thin film transistors, it is frequently necessary to provide an electrical interconnection between a transistor and an adjacent conductor. This can be used in several applications. The conductor can be the source, the drain, or the gate electrode of an adjacent thin film transistor.
Such interconnects are now manufactured in a way that the gate dielectric layer of the thin film transistor tends to be contaminated. FIGS. 1A-1E show the method currently used to manufacture such interconnects. As shown in FIG. 1A, a silicon wafer 11 has bulk transistors in place (not shown), as well as a gate electrode 12 for the to-be-formed thin film transistor and a conductor 13. In this embodiment, the conductor can be the gate electrode, the source, or the drain electrode of an adjacent transistor. A blanket silicon dioxide layer 14 is deposited over the gate electrode, as well as the adjacent conductor. A photoresist layer 15 is applied over the oxide layer 14 and a contact opening 16 is defined. The oxide 14 is then etched, the photoresist 15 removed and the wafer cleaned to provide a contact 17 through the oxide layer 14 to the conductor 13. A layer of polysilicon 18 is deposited. This forms the thin film transistor body and provides a contact 19 connecting the conductor 13 and the transistor body 20 which is formed by photolithographically defining and etching the polysilicon layer 18 above the gate electrode 12. One can then deposit a screen oxide layer and implant the polysilicon to adjust the threshold voltage of the thin film transistor, as desired. The source and drain electrodes are then photolithographically defined and doped, as necessary.
The problem associated with this method is that the photolithographic process imparts impurities into the gate dielectric layer which, in turn, causes the performance of the thin film transistor to degrade.
In the past, this problem has been addressed by merely cleaning the silicon wafers before the body polysilicon deposition and limiting the time of exposure of the wafers to air before the polysilicon deposition. This, however, has proven to be somewhat ineffective and does not totally overcome the problem.